An Rs-485 Transceiver In A Silicon Carbide Cmos Process, 2018 University of Arkansas, Fayetteville
An Rs-485 Transceiver In A Silicon Carbide Cmos Process, Maria Raquel Benavides Herrera
Theses and Dissertations
This thesis presents the design, simulation and test results of a silicon carbide (SiC) RS-485 transceiver for high temperature applications. This circuit is a building block in the design and fabrication of a digital data processing and control system. Automation processes for extreme environments, remote connection to high temperature locations, deep earth drilling, and high temperature data acquisition are some of the potential applications for such a system. The transceiver was designed and developed in a 1.2 µm SiC-CMOS process by Raytheon Systems, Ltd. (UK). It has been tested with a supply voltage of 12 V and 15 V ...
39 - Mars Environmental Module- The Aura Of The Red Planet, 2018 Georgia Gwinnett College
39 - Mars Environmental Module- The Aura Of The Red Planet, Nisha Kurian, Tae Lee, Sairam Tangirala
Georgia Undergraduate Research Conference (GURC)
Mars Environmental Module- The Aura of The Red Planet
Finding the possibility of life in Mars!
We plan to demonstrate the working of a telemetric environmental module made up of multiple environmental-parameter sensors. Our standalone module will consist of environmental sensors managed by one Arduino microcontroller that communicates with sensors and records sensor data that characterize the surrounding environment.
We plan to integrate temperature and humidity sensors to record temperature and humidity of the environment. A soil moisture sensor to obtain data on any possible water present within the soil. A motion sensor to detect any possible motions (such as ...
An Iot System For Converting Handwritten Text To Editable Format Via Gesture Recognition, 2018 Kennesaw State University
An Iot System For Converting Handwritten Text To Editable Format Via Gesture Recognition, Nidhi Patel
Master of Science in Computer Science Theses
Evaluation of traditional classroom has led to electronic classroom i.e. e-learning. Growth of traditional classroom doesn’t stop at e-learning or distance learning. Next step to electronic classroom is a smart classroom. Most popular features of electronic classroom is capturing video/photos of lecture content and extracting handwriting for note-taking. Numerous techniques have been implemented in order to extract handwriting from video/photo of the lecture but still the deficiency of few techniques can be resolved, and which can turn electronic classroom into smart classroom.
In this thesis, we present a real-time IoT system to convert handwritten text into ...
Purdue Air Sense: A Methodology For Improving The Accuracy Of Ambient Aerosol Mass Concentration And Size Distribution Measurement With Low-Cost Optical Sensing Techniques, Rishabh Ramsisaria, Satya Sundar Patra, Brandon Emil Boor
The Summer Undergraduate Research Fellowship (SURF) Symposium
There is a global lack of a means for monitoring air pollutant levels at a local level due to expensive and bulky instrument requirements. It is important to monitor toxic gas levels, as well as particulate matter levels, in the atmosphere to study their effects on human health and to further develop city- and community-level air pollution solutions. In this study, with the means of a Raspberry Pi, low-cost Alphasense Optical Particle Counter and gas sensors, and methodical calibration techniques, we built a portable 3-D printed module powered by clean electricity generated by an on-board Voltaic solar cell that measures ...
Efficacy Of Multi-Threshold Null Convention Logic In Low-Power Applications, 2018 University of Arkansas, Fayetteville
Efficacy Of Multi-Threshold Null Convention Logic In Low-Power Applications, Brent Bell
Theses and Dissertations
In order for an asynchronous design paradigm such as Multi-Threshold NULL Convention Logic (MTNCL) to be adopted by industry, it is important for circuit designers to be aware of its advantages and drawbacks especially with respect to power usage. The power tradeoff between MTNCL and synchronous designs depends on many different factors including design type, circuit size, process node, and pipeline granularity. Each of these design dimensions influences the active power and the leakage power comparisons. This dissertation analyzes the effects of different design dimensions on power consumption and the associated rational for these effects. Results show that while MTNCL ...
Investigating On Through Glass Via Based Rf Passives For 3-D Integration, 2018 Ningbo University
Investigating On Through Glass Via Based Rf Passives For 3-D Integration, Libo Qian, Jifei Sang, Yinshui Xia, Jian Wang, Peiyi Zhao
Mathematics, Physics, and Computer Science Faculty Articles and Research
Due to low dielectric loss and low cost, glass is developed as a promising material for advanced interposers in 2.5-D and 3-D integration. In this paper, through glass vias (TGVs) are used to implement inductors for minimal footprint and large quality factor. Based on the proposed physical structure, the impact of various process and design parameters on the electrical characteristics of TGV inductors is investigated with 3-D electromagnetic simulator HFSS. It is observed that TGV inductors have identical inductance and larger quality factor in comparison with their through silicon via counterparts. Using TGV inductors and parallel plate capacitors, a ...
Arm Mke1xf Mcu Replatform, 2018 California Polytechnic State University, San Luis Obispo
Arm Mke1xf Mcu Replatform, Nathan Hong, Derek Lung, Japsimran Singh, Bevin Tang
After Cal Poly Racing’s electrical team began to hit the technical limits of the ADC and other I/O features of the current 8-bit Atmel AT90 microcontroller unit, it became clear that an upgrade was due. This replatforming project takes the functionalities of the old, 8-bit architecture, and aims to provide a 32-bit version using the ARM MKE1xF MCU. With the idea of having a working PCB as a stretch goal, the scope of the library development was limited to enable base functionality. Thus, the only libraries developed were for the Timer, ADC, SPI, UART, and CAN. Additionally, this ...
Bicycle Power Meter, 2018 California Polytechnic State University, San Luis Obispo
Bicycle Power Meter, Andrew Mcguan
No abstract provided.
Roborodentia Robot: Treadbot, 2018 California Polytechnic State University, San Luis Obispo
Roborodentia Robot: Treadbot, Stephen C. Schmidt
This document is a summary of my contest entry to the 2018 Cal Poly Roborodentia competition. It is meant to be a process overview and design outline of the mechanical, electrical, and software components of my robot.
Genetic Algorithm Amplifier Biasing System (Gaabs): Genetic Algorithm For Biasing On Differential Analog Amplifiers, 2018 California Polytechnic State University, San Luis Obispo
Genetic Algorithm Amplifier Biasing System (Gaabs): Genetic Algorithm For Biasing On Differential Analog Amplifiers, Sean Whalen
Genetic Algorithm Amplifier Biasing System (GAABS) - Senior Project Analysis
Summary of Functional Requirements
This project integrates LTSpice with a python script that runs a genetic algorithm to bias a differential amplifier. The system biases the amplifier with 2 different voltages, the base voltage for the PNP BJTs of the active loads and a voltage controlling the current of the current sink. The project runs via a python script, gets data from LTSpice’s command line call, and iteratively runs until the system is biased to achieve the greatest gain on an arbitrary input voltage.
Some of the main ...
A Basic, Four Logic Cluster, Disjoint Switch Connected Fpga Architecture, 2018 California Polytechnic State University, San Luis Obispo
A Basic, Four Logic Cluster, Disjoint Switch Connected Fpga Architecture, Joseph Prachar
This paper seeks to describe the process of developing a new FPGA architecture from nothing, both in terms of knowledge about FPGAs and in initial design material. Specifically, this project set out to design an FPGA architecture which can implement a simple state machine type design with 10 inputs, 10 outputs and 10 states. The open source Verilog-to-Routing FPGA CAD flow tool was used in order to synthesize, place, and route HDL files onto the architecture. This project was completed in terms of the spirit of the original goals of implementing an FPGA from scratch. Although, the project resulted in ...
How Gpu Rendering Affects Image Processing And Scientific Calculation Speed, Power And Energy On A Raspberry Pi, Qihao He
Electronic Theses and Dissertations
In this thesis, we explore the speed, power, and energy performance of the same data process on the central processing unit (CPU) with and without the acceleration of the Graphics Processing Unit (GPU) on the microcomputer Raspberry Pi (RPI). We tested on the RPI in two different fields. The first was comparing the speed, power, and energy usage with and without GPU acceleration in the image processing impacts on RPI model B+. The second was comparing speed, power, energy usage, and accuracy for scientific calculation with and without GPU acceleration on RPI model B+ and 3B.
We used a novel ...
Automating Knife-Edge Method Of Thz Beam Characterization, 2018 Portland State University
Automating Knife-Edge Method Of Thz Beam Characterization, Christopher Charles Faber
Undergraduate Research & Mentoring Program
The goal of this project is to create a time and cost-effective solution for THz beam profiling.
The knife edge method of beam characterization is a technique to verify the intensity profile of a beam involving traveling a blade orthogonal to the beam path and measuring transmission in successive steps. We use a vector network analyzer (VNA) to measure S21 transmission from a THz source. Manual implementation of this method was time-consuming and inefficient.
Project hardware includes an Arduino, a motor shield, and a ball screw linear rail with stepper motor actuator. Software was created in LabView and data is ...
Improving System-On-Chip Test Networks For: Bandwidth, Security, And Power, 2018 Southern Methodist University
Improving System-On-Chip Test Networks For: Bandwidth, Security, And Power, Saurabh Gupta
Computer Science and Engineering Theses and Dissertations
Modern System-on-Chips (SoCs) provide benefits such as reduction in overall system cost, and size, increased performance, and lower power consumption. Increasing complexity of these Integrated Circuits (ICs) has resulted in a higher probability of manufacturing defects. Manufacturing defects can result in the faulty operation of a system. Thus, it is essential to test an IC after it is manufactured to detect any possible faults in it. These SoCs include on-chip embedded instruments that can be used for test, debug, diagnosis, validation, monitoring, characterization, configuration, or functional purposes. IEEE 1687 Std. (IJTAG) provides a standard interface for the reconfigurable access and ...
Security Analysis Of The Uconn Husky One Card, 2018 University of Connecticut
Security Analysis Of The Uconn Husky One Card, Trevor Phillips
Honors Scholar Theses
The “Husky One Card” is the name given to student IDs at the University of Connecticut. It can identify students, faculty, and staff in a variety of situations. The One Card is used for meal plans, Husky Bucks (an equivalent of money, but valid only in the Storrs area), residence hall/ university facility access, and student health services. The current Husky One Card consists of a picture identification on the front and a standard 1-dimensional barcode and 3-track magnetic strip on the back.
The goal of this thesis is to investigate the feasibility of cloning Husky One Cards, the ease ...
Asynchronous Circuit Stacking For Simplified Power Management, 2018 University of Arkansas, Fayetteville
Asynchronous Circuit Stacking For Simplified Power Management, Andrew Lloyd Suchanek
Theses and Dissertations
As digital integrated circuits (ICs) continue to increase in complexity, new challenges arise for designers. Complex ICs are often designed by incorporating multiple power domains therefore requiring multiple voltage converters to produce the corresponding supply voltages. These converters not only take substantial on-chip layout area and/or off-chip space, but also aggregate the power loss during the voltage conversions that must occur fast enough to maintain the necessary power supplies. This dissertation work presents an asynchronous Multi-Threshold NULL Convention Logic (MTNCL) “stacked” circuit architecture that alleviates this problem by reducing the number of voltage converters needed to supply the voltage ...
Comparison Of Data Transfer Alternatives In Asynchronous Circuits, 2018 University of Arkansas, Fayetteville
Comparison Of Data Transfer Alternatives In Asynchronous Circuits, Mark Howard
Computer Science and Computer Engineering Undergraduate Honors Theses
Digital integrated circuits (ICs) have become progressively complex in their functionality. This has sped up the demand for asynchronous architectures, which operate without any clocking scheme, considering new challenges in the timing of synchronous systems. Asynchronous ICs have less stringent environmental constraints and are capable of maintaining reliable operation in extreme environments, while also enjoying potential benefits such as low power consumption, high modularity, and improved performance. However, when the traditional bus architecture of synchronous systems is applied to asynchronous designs, handshaking protocols required for asynchronous circuit operation result in significantly increased power consumption, offsetting the low power benefit of ...
Automatic Testing In The United States Air Force, 2018 University of Arkansas, Fayetteville
Automatic Testing In The United States Air Force, Pearson Wade
Computer Science and Computer Engineering Undergraduate Honors Theses
The need for standardized Automatic Testing Equipment in the United States Department of Defense has brought about new policies and procedures within entities like the United States Air Force. The diversity and lifespan of systems such as jets, missiles, drones, and other electronics have brought on the need for a new system known as the Versatile Depot Automatic Test Station, or VDATS. The VDATS handles the automatic testing of replaceable digital circuits from different systems. I was introduced to this system firsthand during my time as an intern at Tinker AFB, Oklahoma. This new standardized approach to testing a diverse ...
Silicon Compilation And Test For Dataflow Implementations In Gasp And Click, 2018 Portland State University
Silicon Compilation And Test For Dataflow Implementations In Gasp And Click, Swetha Mettala Gilla
Dissertations and Theses
Many modern computer systems are distributed over space. Well-known examples are the Internet of Things and IBM's TrueNorth for deep learning applications. At the Asynchronous Research Center (ARC) at Portland State University we build distributed hardware systems using self-timed computation and delay-insensitive communication. Where appropriate, self-timed hardware operations can reduce average and peak power, energy, latency, and electromagnetic interference. Alternatively, self-timed operations can increase throughput, tolerance to delay variations, scalability, and manufacturability.
The design of complex hardware systems requires design automation and support for test, debug, and product characterization.
This thesis focuses on design compilation and test support for ...
Chip: Clustering Hotspots In Layout Using Integer Programming, 2018 Iowa State University
Chip: Clustering Hotspots In Layout Using Integer Programming, Rohit Reddy Takkala
No abstract provided.